Price:Negotiable
Brand:Kingston
Quantity:100

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ShenzhenMainbert Technology Co.,Ltd

[Province: Guangdong]   

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Hynix ddr ram memory

Model No.:	Hynix ddr ram memory
Brand Name:	Kingston
Function:	Store the datas
Certificate:	CE,Rohs
Export Area:	worldwide
Cooperative Company:	Shenzhen Mainbert Technology
Place of Origin:	Guangdong

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CompanyInfo
MBT Technology Limited is a professional manufacturer and traderfor PC products in Hong Kong and mainland China. Our main seriesinclude MP5, MP4, MP3 and SD card, RAM, and USB flash memory disk.We now intend to find agents for these items around the world. Ifyou are interested, please feel free to contact us. 
We have a specialized trade department devoted to exportactivities,three subsidiary factories, as well as dozens of localpartner companies.  
If you are interested in any of our it...
view moreCompanyProfile

• OEM Services Provided: NO
• Business Type: Manufacturer
• QualityCertificate:CE, RoHS
• Main ExportMarkets:North America, Western Europe,Eastern Europe, South America, Southeast Asia, Eastern Asia, MidEast, Oceania, Africa

• Payment & Shipping Terms:
• Unit Price: 8.9 USD
• Payment Term: T/T or Western Union
• MOQ: 500piece
• Means of Transport: EMS, DHL or UPS etc.

• Supply Capacity:
• Production Capacity: 1000000000000
• Packing:retail sealed packing
• Delivery Date: 3-5 working dyas

Hynix ddr ram memory

1) DDR 400/333 & DDRII 533/667/800MHz
2) 168/184/240-pin socket type dual in line memory module(DIMM)
3) 2.6V power supply
4) Data rate: 400/333/533/667/800Mbps (max. )
5) 2.5 V (SSTL-2 compatible) I/O for DDR I products, 1.8V powersupply for DDR II
products
6) Double data rate architecture, two data transfers per clock
7) Bi-directional, data strobe (DQS) is transmitted/received withdata, to be
Used in capturing data at the receiver
8) Data inputs and outputs are synchronized with DQS
9) DQS is edge aligned with data for read, center aligned with datafor write
10) Differential clock inputs (CK and CK)
11) DLL aligns DQ and DQS transitions with CK transitions
12) Commands entered on each positive CK edge, data referenced toboth
Edges of DQS
13) Auto pre-charge option for each burst access
14) Programmable burst length: 2, 4, 8
15) Programmable/CAS latency (CL): 3
16) Programmable output driver strength: Normal/weak
17) Refresh cycles: (8192 refresh cycles/64ms)
18) 7.8US maximum average periodic refresh interval
19) 2 variations of refresh
20) Auto refresh
21) Self refresh1) DDR 400/333 & DDRII 533/667/800MHz
2) 168/184/240-pin socket type dual in line memory module(DIMM)
3) 2.6V power supply
4) Data rate: 400/333/533/667/800Mbps (max. )
5) 2.5 V (SSTL-2 compatible) I/O for DDR I products, 1.8V powersupply for DDR II
products
6) Double data rate architecture, two data transfers per clock
7) Bi-directional, data strobe (DQS) is transmitted/received withdata, to be
Used in capturing data at the receiver
8) Data inputs and outputs are synchronized with DQS
9) DQS is edge aligned with data for read, center aligned with datafor write
10) Differential clock inputs (CK and CK)
11) DLL aligns DQ and DQS transitions with CK transitions
12) Commands entered on each positive CK edge, data referenced toboth
Edges of DQS
13) Auto pre-charge option for each burst access
14) Programmable burst length: 2, 4, 8
15) Programmable/CAS latency (CL): 3
16) Programmable output driver strength: Normal/weak
17) Refresh cycles: (8192 refresh cycles/64ms)
18) 7.8US maximum average periodic refresh interval
19) 2 variations of refresh
20) Auto refresh
21) Self refresh